1. Field of Invention
The present invention relates to method of manufacturing shallow trench isolation (STI). More particularly, the present invention relates to a method of manufacturing shallow trench isolation that includes the use of a chemical-mechanical polishing (CMP) operation.
2. Description of Related Art
Chemical-mechanical polishing (CMP) is a method for providing global planarization during the fabrication of very large scale integration (VLSI) circuits or the higher-density ultra large scale integration (ULSI) circuits. Since CMP is the only method capable of providing the necessary planarization when the feature size is small, most manufacturers are now pooling research efforts to investigate methods of improving this technique.
As size of semiconductor devices continues to shrink, for example, to a line width of between 0.18 .mu.m to 0.25 .mu.m or even smaller (deep sub-half micron range), the performance of a CMP operation, especially in the planarization of an oxide layer above a shallow trench, is becoming increasingly important. However, in order to prevent the dishing of a polished oxide layer above a wide trench opening, a manufacturing method that utilizes a reverse tone mask followed by an etching back operation is deployed. The addition of a reverse tone mask and an etching back operation is capable of improving CMP uniformity.
In a conventional shallow trench isolation manufacturing operation, size of active regions varies tremendously. Therefore, the shallow trenches formed between those active regions may have various sizes. FIGS. 1A through 1D are schematic, cross-sectional views showing the progression of steps in a manufacturing process for fabricating a conventional shallow trench isolation structure by forming a reverse tone mask followed by a chemical-mechanical polishing operation.
First, as shown in FIG. 1A, a shallow trench 101 and active regions 102a/102b are formed in a substrate 100 using photolithographic and etching processes. Since the sizes of active region 102a and active region 102b are different, the size of each shallow trench 110 will be different as well. Furthermore, a silicon nitride layer 104 is also formed over the active regions 102a/102b. Thereafter, a layer of oxide is deposited to fill completely the shallow trenches 101 and cover the entire substrate 100, thereby forming an oxide layer 106. The oxide layer 106 can be formed using, for example, atmospheric pressure chemical vapor deposition (APCVD). Due to the presence of shallow trenches in the substrate 100, the upper surface of the oxide layer 106 has an undulating profile.
Next, as shown in FIG. 1B, a photoresist layer is formed over the oxide layer 106. Then, the photoresist layer is developed and etched using photolithographic method to form a reverse tone mask 108. This reverse tone mask 108 covers the shallow trenches 101 with an opening 110 exposing a portion of the substrate in the active region 102a, which occupies a larger surface area. In fact, the opening 110 forms a complementary region of the active region 102a.
Thereafter, as shown in FIG. 1C, the exposed oxide layer 106 above the active region 102a is etched using the reverse tone mask 108 as an etching mask. Consequently, a large portion of the oxide layer 106 above the active region 102a is removed resulting in the appearance of small bumps on the upper surface of the oxide layer 106 near the edge of the opening 110. Subsequently, the reverse tone mask 108 is removed.
Next, as shown in FIG. 1D, a chemical-mechanical polishing operation is carried out to remove a portion of the oxide layer 106 that lies above the shallow trenches 101 (FIG. 1B) using the silicon nitride layer 104 as a polishing stop layer. Eventually, the upper surface of the oxide layer 106a is level with the top surface of the silicon nitride layer 104.
One of the advantages of using a reverse tone mask to form shallow trench isolation structures includes the reduction of polishing time. Consequently, both productivity and window of tolerance in producing the isolation structures are increased. Furthermore, the reduction of polishing time can reduce the degree of over-polishing of the silicon nitride layer. Hence, dishing of the oxide layer resulting from chemical-mechanical polishing is minimized.
Nevertheless, the utilization of a reverse tone mask introduces one more processing step in the fabrication of shallow trench isolation structures. Therefore, production cost and degree of complexity are affected. Moreover, due consideration must be paid regarding the proper alignment of the reverse tone mask. If the reverse tone mask is not properly aligned, the opening within the mask exposes a portion of the oxide layer within the shallow trench. Therefore, when the oxide layer is subsequently etched, a portion of the oxide within the shallow trench is etched away, and grooves are formed. These grooves may intensify any kink effect within a wafer chip so that current may leak out from the grooves and result in a short-circuit. Hence, the yield of the silicon chip may be lowered.
In light of the foregoing, there is an urgent need to combat the problems caused by the use of a reverse tone mask in chemical-mechanical polishing so that the yield rate of devices can increase despite a reduction in line width.